| 摘要 |
PROBLEM TO BE SOLVED: To use an oscillator that is more inexpensive and has low accuracy. SOLUTION: A control amount of a frequency division ratio in a variable frequency divider 34 is decided from an output of an integration device 14 during reception. A system master clock is obtained in a sleep state is obtained by applying decimal point frequency division to a master clock oscillated from a crystal oscillator 18A by the variable frequency divider 34. Even in the case of sleep during a standby state in a PDC or the like, the system master clock in the sleep state can accurately be maintained. A low precision oscillator is enough for the crystal oscillator 18A. |
