| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of D flip-flops by counting the number of bits of an input signal on the same level as a level of a setting signal of each pattern section up to the number of setting bits of each pattern section in order from the first pattern section of a synchronizing signal pattern, and detecting a synchronizing signal when it coincides with a finish time in the case where an input signal is an synchronizing signal. SOLUTION: The synchronizing signal detecting device judges whether signals corresponding to each pattern section of a synchronizing signal exist in input signals or not by 'first processing' in which the number of input bits of an input signal on the same signal level as a setting signal level of each pattern section of a synchronizing signal pattern is counted by a counter synchronizing with a clock pulse up to the number of setting bits of each pattern. When a finish time of 'first processing' coincides with a finish time when an input signal is a synchronizing signal, it can be judged that a synchronizing signal is inputted. Thereby, it is not required that D flip-flop of the same number as the number of bits of a synchronizing signal pattern are to be used. |
