发明名称 |
ARITHMETIC UNIT AND CIPHER PROCESSOR |
摘要 |
PROBLEM TO BE SOLVED: To perform operation in an extension field of 2 in addition to integer type operation only by adding minimum architecture by placing a multiplying circuit in operation by propagating a carry or without propagating the carry. SOLUTION: On a coprocessor 1, an integer type multiplying circuit 11 performs integer type multiplication between data X in a buffer X and data Y in a buffer Y and outputs the result to a selector 13. A circuit 12 for multiplication in the extension field of 2 performs multiplication in the extension field of 2 by the data X and data Y and outputs the result to a selector 13. The difference between the integer operation by the integer type multiplying circuit 11 and extension field multinomial operation of 2 by the multiplying circuit 12 is based on whether or not there is a carry (carry propagation). The selector 13 is switched according to the control signal S1 from a control part 5. An adding circuit 14 and an adding circuit 15 also switch integer type addition and addition in the extension field of 2 with the control signal S1. |
申请公布号 |
JP2000207387(A) |
申请公布日期 |
2000.07.28 |
申请号 |
JP19990011989 |
申请日期 |
1999.01.20 |
申请人 |
TOSHIBA CORP |
发明人 |
SHIBA KAZUE;KAWAMURA SHINICHI |
分类号 |
G06F7/00;G06F17/10;G09C1/00 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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