| 摘要 |
PROBLEM TO BE SOLVED: To increase a display rate without increasing a basic input data rate and to reduce a flicker in a display by providing an addressable latch having a first address input and a multiplexer having a second address input. SOLUTION: The addressable analog latch 3 is provided with the first address input selecting any one of storage locations for storing plural storage locations and the image data. The 4:1 multiplexer 7 is provided with the second address input selecting for supplying at a time the image data from any one of the storage locations to a display pixel 9. The address inputs of the addressable analog latch 3 and the 4:1 multiplexer 7 are connected to the same counter 11, and though the addressing is automatically and precisely synchronized, addressing is performed, with first, second sequence shifting a phase by one step.
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