发明名称 PRODUCTION OF SEMICONDUCTOR DEVICE HAVING TRENCH ELEMENT ISOLATING REGION
摘要 PROBLEM TO BE SOLVED: To satisfactorily embed an insulating layer in a trench element isolating region. SOLUTION: This method includes the following processes of a process for successively forming a pad layer 12, a stopper layer 14 and a resist layer R1 having a prescribed pattern on a silicon substrate 10, a process for performing the ion implantion of oxygen materials to the stopper layer 14 obliquely to the surface of the stopper layer 14 with the resist layer R1 as a mask, an etching process for etching the stopper layer 14 and the pad layer 12, a process for forming a trench by etching the silicon substrate 10, a process for forming a protecting film 90 at a terminal part 14a of the stopper layer 14 by thermal oxidation, a process for flattening an insulating layer 20 to charge the trench while forming the insulating layer 20 all the entire surface, a process for removing the stopper layer 14, and a process for forming the trench element isolating region by etching a protruding part 22 and the protective film 90.
申请公布号 JP2000208611(A) 申请公布日期 2000.07.28
申请号 JP19990007179 申请日期 1999.01.14
申请人 SEIKO EPSON CORP 发明人 MARUO YUTAKA
分类号 H01L21/76;H01L27/08;(IPC1-7):H01L21/76 主分类号 H01L21/76
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