| 摘要 |
<p>A method of manufacturing semiconductors is provided which avoids metal deposition in voids [216] formed in the dielectric [210] between interconnects [206, 208]. In a preferred embodiment, an etch stop recess portion [220] is provided over the dielectric [210] which encloses the interconnects [206, 208] to prevent via openings [224, 226] from extending into the voids [216] during the etching of the via openings [224, 226]. Accordingly, metal deposition of the voids [216] during metal deposition of the vias [224, 226] is avoided. As a result, the semiconductors so formed have reduced capacitance between the interconnects [206, 208] and improved reliability since the voids [216] are cleared of any metal deposition.</p> |
