| 摘要 |
A semiconductor integrated circuit device having a CPU or a logic circuit 4, a DRAM 2, and a plurality of selectors 8 mounted on a semiconductor chip. The selectors 8 are formed on a wiring 5 including a plurality of lines through which the CPU or the logic circuit 4 is connected to the DRAM 2. According to a control signal received through a wiring 6, a wiring 7 for transferring test patterns is connected to the DRAM 2, or the CPU or the logic circuit 4 is connected to the DRAM 2.
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