发明名称 PARTIALLY BLANKET WAFER PATTERN WRITING METHOD FOR CHARGED PARTICLE BEAM LITHOGRAPHY
摘要 PURPOSE: A method for writing a partially blanket wafer pattern for a charged particle beam lithography is provided to improve the transfer accuracy of lithographed pattern. CONSTITUTION: In this method, a pattern product(24) is extracted from interlayer calculation between pattern data of both a lithographed layer for a gate electrode and an underlying base layer for a diffusion pattern. Next, the gate electrode pattern closely adjacent to both boundaries(26,28) of the pattern product(24) is included as a margin(30,32) in an extended pattern. Based upon the extended pattern, a partially blanket wafer pattern(34) is then written as data. Additionally, the partially blanket wafer pattern(34) is positioned within an imaginary boundary(36). A required mask is manufactured by the data of the pattern(34), and the imaginary boundary(36) is used for defining the border between the neighboring patterns(34) on the mask. The lithographed pattern can be transferred with high accuracy onto the base layer by using the mask having the partially blanket wafer pattern(34).
申请公布号 KR20000047535(A) 申请公布日期 2000.07.25
申请号 KR19990044789 申请日期 1999.10.15
申请人 NEC CORPORATION 发明人 YAMADA, YASUHISA
分类号 H01L21/027;G03F7/20;H01J37/302;H01J37/317;H01L21/46;(IPC1-7):H01L21/027 主分类号 H01L21/027
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