发明名称 REGISTER ADDRESSING IN A DATA PROCESSING APPARATUS
摘要 PURPOSE: Register addressing in a data processing apparatus is provided to only execute once a remapping instruction used to configure a register remapping logic prior to the a repeat instruction being executed. CONSTITUTION: A data processing apparatus comprises: a plurality of registers for storing data items to be processed; a processor for processing instructions to be applied to data items stored in plurality of registers; and register remapping logic for converting a logical register reference within a preselected set of instructions to a physical register reference identifying the register containing the data item required for processing by the processor. A remapping instruction need only be executed once in order for the remapping to be applied to a desired number of instructions. This is in contrast to prior art techniques, where subsequent to a remapping instruction being executed, the remapping is applied to all subsequent instructions, i.e. a desired number of instructions cannot be selected. The Register addressing in a data processing apparatus is particularly advantageously employed in apparatus arranged to repeat an instruction loop, the instruction loop including said preselected set of instructions. In such cases, loop hardware used to manage the repeat instruction can be arranged to update the register remapping logic each time the instruction loop is repeated, and hence the remapping instruction used to configure the register remapping logic is only executed once prior to the repeat instruction being executed.
申请公布号 KR20000048532(A) 申请公布日期 2000.07.25
申请号 KR19997002442 申请日期 1999.03.22
申请人 ARM LIMITED 发明人 YORK, RICHARD;FRANCES, HEDLEY, JAMES;SYMES, DOMINIC;BILES, STUART
分类号 G06F9/34;G06F;G06F9/30;G06F9/32;G06F9/38;(IPC1-7):G06F9/34 主分类号 G06F9/34
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