CIRCUIT FOR DETECTING TRANSITION OF ADDRESS FOR SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A semiconductor memory device is provided to prevent a read fail by cutting an output of latch signal from a detecting amplifier though control signals of detecting amplifier. CONSTITUTION: A detecting circuit of address transition contains a summator(210) to generate a first pulse signal by summing signals detected a change of an outer address signal. A first noise filter(220) outputs a second pulse signal having a pulse width as a previously set delayed time by receiving the first pulse signal. A first generating circuit of short pulse(230) generates a third pulse signal by delaying and reversing the second pulse signal. A second generating circuit of short pulse(240) outputs a reference signal to set latch activating section of the detecting amplifier by receiving the third pulse signal when the first pulse signal is inputted to the first noise filter. A second noise filter(270) outputs a latch signal of detecting amplifier by receiving the reference signal and reducing a pulse width of the reference signal.