| 摘要 |
PURPOSE: A Command Pad Circuit for semiconductor elements is provided to ensure sufficient margin of setup pad/hold pad time during clock latch process. CONSTITUTION: A Command Pad Circuit for semiconductor elements is composed of the following components: a setup/hold on pad, a setup/hold time comparative output(42), a clock delaying channel option pad(44), numerous NMOS transistors, a clock command processing block, and a command pad processing block. This device prevents clock_i pad and command_i pad from not being able to maintain a 90 °phase due to characteristic changes that could occur during manufacturing process. This device enables command_i pad to actively delay clock_i so as to ensure sufficient amount of tSETUP, tHOLD margin.
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