CLOCK PHASE CONTROLLING APPARATUS

摘要

PURPOSE: A clock phase controlling apparatus is provided to reduce the power consumption and the layout area by using only digital devices including two inverters for an output unit. CONSTITUTION: An input unit(110) inputs first and second external clock signal and first to third control signals and outputs first to third sub control signals of the inverted input signals. A gate unit(120) outputs the first and second external clock signals according to the first to third control signals. An amplifier(130) inputs the output of the gate unit(120) and amplifies the output of the gate unit(120) in a certain rate. An output unit(140) inputs the output of the amplifier(130) and outputs the clock signal of a CMOS level.