| 摘要 |
<p>An integrated circuit tester (10) includes a set of digital (14(1)-14(N)) and analog channels (16(1)-16(M)), each of which may be programmed to carry out a sequence of test activities at pins of an integrated circuit under test (12). The channels are interconnected by a trigger bus (24), and each channel may be programmed to respond to a detected event during a test by transmitting a particular trigger code to every other channel via the trigger bus (24). Each channel may also be programmed to respond to a particular trigger code arriving on the trigger bus (24) by branching its sequence of test activities. Thus any channel detecting an event during a test can signal all other channels to immediately terminate a current sequence of test activities and branch to another set of test activities.</p> |
