发明名称 Multiple-clock transmission line and data storage element
摘要 <p>A device and method for initializing the state of a computer, including individual transmission lines within the computer. A signal sending circuit provides an output signal onto a transmission line. While the signal is propagated along the transmission line, a second signal is provided in series on the same transmission line. Simultaneously therewith, the value of the first signal is stored in a data storage element. Subsequent bits may be placed on the transmission line before the first bit is received at a second end of the transmission line. Each bit placed on the transmission line is stored in a respective data storage element. The value of the data in the data storage elements can be tested to determine the exact state of any transmission line in the system. In addition, if operation of the transmission line is interrupted or terminated for any reason since the data is stored which was propagating along the transmission line, this data can be read onto the same transmission line, onto a subsequent transmission line, to reinitialize a transmission line within the system to have the exact value as that held at the time of termination of the operation. Operation can then resume on the next clock cycle and the machine will be at an exact known state or, in one embodiment, each node of the entire machine will be in exactly the same state as when the operation was terminated. &lt;IMAGE&gt;</p>
申请公布号 EP1020802(A2) 申请公布日期 2000.07.19
申请号 EP19990410181 申请日期 1999.12.22
申请人 TERA COMPUTER COMPANY (A CORPORATION OF THE STATE OF WASHINGTON) 发明人 HELLRIEGEL, STEPHEN V.R.
分类号 G06F3/00;G06F13/42;H03M9/00;(IPC1-7):G06F13/40 主分类号 G06F3/00
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