发明名称 SOURCE CLOCK REPRODUCING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To reproduce the source clock of the transmitting data with high accuracy at the receiving side even when the supplied network clocks are different between the transmitting and receiving sides by generating a reproducing source clock, based on the difference value between the correction value and a receiving time stamp. SOLUTION: At a receiving part 10, a receiving cell is decomposed by a cell decomposing means 11 and the data are inputted to a buffer 12. A time stamp is supplied to an adder 13 and added to the correction value supplied from a correction value generation circuit 14 to generate the time stamp value that is corrected to be adaptive to the clock of the receiving side. A difference unit 15 subtracts the time stamp value of the receiving side supplied from a register 19 from the corrected time stamp value and supplies this difference value to a control circuit 16. The circuit 16 produces a control signal based on the difference value of time stamps between the transmitting and receiving sides. A VCXO (voltage controlled transmitter) 21 reproduces a source clock having the frequency corresponding to the control voltage.</p>
申请公布号 JP2000201151(A) 申请公布日期 2000.07.18
申请号 JP19990000473 申请日期 1999.01.05
申请人 NEC ENG LTD 发明人 SUZUKI NORIO
分类号 H04L7/027;H04L7/04;H04L12/28;H04L12/70;(IPC1-7):H04L12/28 主分类号 H04L7/027
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