发明名称 PIPE COUNTER SIGNAL GENERATING DEVICE IN SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain a pipe counter for controlling an output path of a semiconductor memory which can input and output double data at a rising edge and a failing edge of one clock. SOLUTION: In a semiconductor memory operating synchronized by an external clock, this pipe counter comprises a pipe counter controller 202 generating a pipe counter control signal, a pipe counter activating unit 204 in which many counter activating signals are generated responding to the pipe counter control signal and only one out of the plural counter activating signals is activated. and pipe counter signal drivers 206a, 206b, 206c in which any of the plural counter activating signals is received and pipe counter signals are not activated simultaneously each other.
申请公布号 JP2000200481(A) 申请公布日期 2000.07.18
申请号 JP19990368178 申请日期 1999.12.24
申请人 HYUNDAI ELECTRONICS IND CO LTD 发明人 YI SEUNG-HYUN
分类号 G11C11/407;G11C7/10;G11C8/04;(IPC1-7):G11C11/407 主分类号 G11C11/407
代理机构 代理人
主权项
地址