发明名称 |
Test circuit |
摘要 |
A test circuit includes a writing unit that outputs m-bit data captured upon receipt of a clock signal, branches the m-bit data n identical m-bit data signals, and stores the n m-bit data signals in a memory device. A function determining unit reads the n m-bit data signals from the memory, compares one of the n m-bit data signals to an m-bit expected value, and determines coincidence or non-coincidence between the n m-bit data signal and an expected value.
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申请公布号 |
US6092227(A) |
申请公布日期 |
2000.07.18 |
申请号 |
US19980018934 |
申请日期 |
1998.02.05 |
申请人 |
MITSUBISHI ELECTRIC SYSTEM LSI DESIGN CORPORATION;MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TOKI, HIDEKI;KITAGUCHI, AKIRA;HATAKENAKA, MAKOTO;SHIROSHIMA, KIYOYUKI;MATSUO, MASAAKI;SAITOH, TSUYOSHI |
分类号 |
G01R31/28;G06F11/22;G11C11/413;G11C29/10;G11C29/34;G11C29/36;G11C29/38;G11C29/56;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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