发明名称 DATA INPUT/OUTPUT CIRCUIT AND INTERFACE SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a data input/output circuit in which receiving timing of input data can be set to an optimum value and an interface system provided with the circuit. SOLUTION: This circuit is a data input/output circuit for transmitting and receiving data synchronized with a clock differentially inputted with a reference voltage, and has registers 18, 19 in which setting data for setting changeably a level of a reference voltage are recorded, and level shift circuits 16, 17 setting a level of a reference voltage to the prescribed value conforming to the setting data recorded in the registers 18, 19. And a phase of an internal clock being differential output is adjusted by the reference voltage, and data can be received surely.
申请公布号 JP2000200482(A) 申请公布日期 2000.07.18
申请号 JP19990001288 申请日期 1999.01.06
申请人 NEC CORP 发明人 ISHIKAWA TORU
分类号 G11C11/407;G06F12/00;G11C7/00;G11C7/10;G11C11/4076;G11C11/409;G11C11/4093;(IPC1-7):G11C11/407 主分类号 G11C11/407
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