发明名称 |
High speed semiconductor memory apparatus including circuitry to increase writing and reading speed |
摘要 |
A semiconductor memory apparatus with a memory array, a first global bit line connected to a sense amplifier, a second global bit line connected to a write amplifier, and a selection circuit for connecting a plurality of bit lines selectively to the first global bit line and the second global bit line.
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申请公布号 |
US6091629(A) |
申请公布日期 |
2000.07.18 |
申请号 |
US19970906883 |
申请日期 |
1997.08.06 |
申请人 |
HITACHI, LTD. |
发明人 |
OSADA, KENICHI;HIGUCHI, HISAYUKI;ISHIBASHI, KOICHIRO |
分类号 |
G11C11/413;G06F12/08;G11C7/06;G11C7/18;G11C11/401;G11C11/41;H01L21/8244;H01L27/11;(IPC1-7):G11C11/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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