| 摘要 |
PURPOSE: A multi-layered wiring of a semiconductor device is provided to improve a junction leakage, a contact resistance and a surface resistance. CONSTITUTION: In a manufacture of a multi-layered wiring, an interlayer dielectric(34) is formed on a semiconductor substrate(30) having a doping region(32) such as source or drain therein. The interlayer dielectric(34) is then etched to partly expose the doping region(32) through a hole(36). At this time, the doping region(32) is also etched to some extent. Next, an undoped silicon layer is deposited on the interlayer dielectric(34), on sidewalls of the hole(36), and on the exposed doping region(32). Subsequently, a refractory metal layer is deposited on the undoped silicon layer, and a heat treatment process is then carried out to form a silicide layer(40) by uniting a metal in the refractory metal layer and a silicon in the undoped silicon layer. Next, a capping metal layer(42) is formed on the silicide layer(40) above the doping region(32).
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