| 摘要 |
PURPOSE: An analog-to-digital converter of a successive approximation type is provided to mitigate an offset and an affect owing to a clock feedthrough. CONSTITUTION: An analog-to-digital converter of a successive approximation type comprises an input stage(208) which samples and holds an analog input signal from the exterior. A digital-to-analog converter(202) is connected between a positive reference voltage(Vref+) and a negative reference voltage(Vref-), and generates an analog comparison signal corresponding to a digital code from a successive approximation register(SAR). A reference voltage generator(212) samples and holds a voltage corresponding to half the reference voltage(Vref+). A switch(214) is connected between the digital-to-analog converter(202) and an input terminal of a comparator(204) and is controlled by a hold signal(hold) from a SAR logic(206) so as to transfer an analog comparison signal to the input terminal of the comparator(204). The comparator(204) receives the sampled input signal of the input stage(208), the reference voltage(Vref/2) of the reference voltage generator(212), and the analog comparison signal transferred through the switch(214). The comparator(204) compares the sampled input signal or the analog comparison signal with the reference voltage, and outputs a high level through a positive output when the sampled input signal or the analog comparison signal is higher than the reference voltage. The comparator(204) outputs a low level through the positive output when both the sampled input signal and the analog comparison signal are less than the reference voltage. The SAR logic(206) receives an output of the comparator(204) through a latch(210), and generates a digital code value of the inputted analog signal.
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