LATCH CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A latch circuit in a semiconductor memory device is provided to secure the stable reading and writing operations in a semiconductor memory device. CONSTITUTION: After operating a sensing amplification, a sensing amplifier(110) is disabled by a sensing amplifying enable signal of low level. A latch input enable signal is disabled into low level. Therefore, a high level is output to the output data of an input unit(400) and an S-R typed flipflop(410) maintains current stored data. An output unit(420) turns on and holds the level of the signal inputted into an output buffer(140) not to be vibrate by disabling the latch input enable signal into low level and by enabling a latch output enable signal into high level at the same time.