发明名称 PROCESSORS INTERFACE DEVICE
摘要 PURPOSE: A device for interfacing among processors is provided to make service not to be interrupted under communication fault without interruption by a duplicating bus connecting with the numerous processors physically. CONSTITUTION: A device for interfacing among processors comprises a first and a second bus, a third and a fourth bus, a first receiving data processor(4041-404n), a second data processor(304), and a master processor(30). The first and the second bus provide data from a slave processor to a master processor. The third and the fourth bus provide data from the master processor to the slave processor. The first receiving data processor provides only data from one bus of the first bus and the second bus to the slave processor bus according to the control signal. The second receiving data processor provides data from one bus of the third and the fourth bus according to the control signal to the master processor. And the first and the second receiving data processor control to provide the data from another bus to the related processor, in case of communication fault after checking whether the bus selected by the first and the second receiving data processor communicates every predetermined time.
申请公布号 KR20000044392(A) 申请公布日期 2000.07.15
申请号 KR19980060889 申请日期 1998.12.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, DONG WOO
分类号 G06F15/16;(IPC1-7):G06F15/16 主分类号 G06F15/16
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