发明名称 BUFFER FOR REARRANGING CELLS
摘要 PURPOSE: A buffer for rearranging cells is provided to use a relative time which takes the cell comes a switch network, as zero, without requesting a common clock for a time stamp. CONSTITUTION: A buffer for rearranging cells comprises a maximum delay register(218), a base address raise register(216), cell buffer(212), delayer(214), a cell address generator, a multiplexer(224), a memory address register(226), a memory buffer register(234), a cell buffer memory(236), a first flipflop(228), a memory assigning map(230), and a second flipflop(232). The maximum delay register(218) has a specific initial value by initializing as a maximum of slots storing cells, and outputs a maximum delay by the specific initial value, through an internal clock. The base address raise register(216) stores a base address of a circulating range by raising the initial value one by one with the circulating type by a cell time clock, and outputs the base address by the internal clock. The cell storage address generator is composed of a subtracter(220) and an adder(222). The cell buffer memory(236) stores cells applied from the memory buffer register(234) in a cell storage address, and outputs a cell responded to a base address the memory address register indicates. The first flipflop(228) latches the cell reaching signal. The memory assigning map(230) stores in a bit responded to the cell storage address which the memory address register indicates, so as to respond to the cell stored available cell information of the cell responded to a signal reaching a latched cell, and outputs available cell information to the bit. The second flipflop(232) latches the available cell information.
申请公布号 KR20000042903(A) 申请公布日期 2000.07.15
申请号 KR19980059200 申请日期 1998.12.28
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, JAE HYEON
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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