发明名称 MULTI CHIP PACKAGE
摘要 PURPOSE: A multi chip package is provided to reduce a size of the package to that of a chip and to improve electrical characteristics and structural reliability. CONSTITUTION: A multi chip package includes a first chip(20) and a second chip(10). The first chip(20) is coated with an insulating layer(21) but pads(22) formed on the chip(20). The pads(20) are respectively connected to solder balls(30) through metal patterns(23) selectively formed on the insulating layer(21). The second chip(10) is also coated with an insulating layer(11), and pads(12) thereon are exposed through the insulating layer(11). In addition, respective metal bumps(13) are formed on the pads(12). The second chip(10) is turned over so that the metal bumps(13) are faced toward and then electrically connected to the metal patterns(23) of the first chip(20). The solder balls(30) of the first chip(20) are located outside of the mounted second chip(10) and higher than the second chip(10). The first chip(20) may further have an outermost insulating layer(24) which mostly covers the metal patterns(23) but partly expose the metal patterns(23) for connections with the metal bumps(13) and the solder balls(30).
申请公布号 KR20000042664(A) 申请公布日期 2000.07.15
申请号 KR19980058915 申请日期 1998.12.26
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 KIM, JAE MYEON
分类号 H01L23/28;H01L21/98;H01L25/065 主分类号 H01L23/28
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