发明名称 |
METHOD FOR FABRICATING TRANSISTOR |
摘要 |
PURPOSE: A method for fabricating a transistor is provided to reduce a short channel effect and a hot carrier effect by increasing a depletion layer at a junction region. CONSTITUTION: A method for fabricating a transistor comprises forming a gate oxide layer(12) and a polysilicon layer(13) sequentially on a semiconductor substrate(11) and patterning the layers(12,13) to form a gate electrode. Impurity junction regions of a low concentration are formed at the semiconductor substrate by a low-concentration ion implantation method by using the gate electrode as a mask. Spacers consisting of an insulation material are formed at both sidewalls of the gate electrode. High-concentration impurity junction regions(16) are formed at the substrate by a high-concentration ion implantation by using the gate electrode and the spacers as a mask. A silicide film(17) is formed on a resultant structure by a silicide process. After removing the spacer, an impurity of an opposed type to the substrate is implanted by using the silicide film(17) as a mask.
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申请公布号 |
KR20000045342(A) |
申请公布日期 |
2000.07.15 |
申请号 |
KR19980061900 |
申请日期 |
1998.12.30 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD. |
发明人 |
GEUM, DONG RYUL;JEONG, JAE GWAN |
分类号 |
H01L29/78;(IPC1-7):H01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
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主权项 |
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地址 |
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