METHOD FOR PROCESSING CACHE MISS

摘要

PURPOSE: A method for processing cache miss is provided to reduce a data collision in a bus and reduce a process cycle in a cache miss, by performing an instruction fetch(IF) stage when a data access is performed in a memory(MEM) stage of an equal cycle. CONSTITUTION: A method for processing cache miss by a micro-processor or a micro-controller of a pipeline system having many stages, comprises the steps as follows. When a first stage fetching an instruction word and a second stage accessing data from an external memory are not performed in an equal cycle, a first cache miss cycle generating an external address needed in a cache miss is performed without condition regardless of an existence of a cache hit or miss in the first state. When the first stage and the second stage are performed in an equal cycle, just a corresponding instruction word is fetched without performing the first cache miss cycle in the first stage.