| 摘要 |
PURPOSE: A comparing apparatus is provided to improve the total compare speed and reduce the implementing size and power consumption by implementing an equivalent compare function using a minimum gate. CONSTITUTION: A comparing apparatus includes a precharge unit(21) for precharging a node 1 in response to a clock signal(CLK), a discharge unit(22) for discharging a node 2 in response to a clock signal, and a compare unit(20) having a plurality of unit comparators for comparing respective bits of two data to be compared. The precharge unit(21) consists of a PMOS transistor(P1) in parallel connected to a power supply voltage and the node 1, to the gate of which the clock signal(CLK) is inputted and an NMOS transistor(N1) to the gate of which a signal of an inverted node 1 is inputted. The discharge unit(22) is connected between the node 2 and a ground power supply voltage and consists of an NMOS transistor(N2) to the gate of which the clock signal(CLK) is inputted. A final compare result signal(A=B) is outputted in response to the signal of the node 1. The plurality of unit comparators in the compare unit(20) is in parallel connected between the nodes 1 and 2.
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