| 摘要 |
PROBLEM TO BE SOLVED: To provide a method and an apparatus for generating a test pattern by which a test pattern generation time can be shortened. SOLUTION: A circuit block which influences a value of an output terminal of a circuit is set as a cone. Cones are extracted (S21) and collected (S3) in an order to a larger number of gates from the entire circuit, and a partial circuit as a pattern generation unit is formed (S4). When an overlap between the extracted cone and partial circuit generating a pattern exceeds a threshold (S32), the cone is deferred, and the threshold is increased (S34) if no subject cone remains (S33). When the partial circuit is generated (S4), a list of undetected failures included in the circuit is formed, and eliminated from an undetected failure list of the entire circuit (S41). Information on the partial circuit and the failure list are handed to a vacant CPU (S6) to generate the pattern (S7). When the result is sent back (S8), information on failures with patterns not generated is returned to the undetected failure list of the entire circuit. The above process is repeated until a failure detection ratio becomes a target value or patterns of all cones are generated. |
