发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE HAVING TRENCH ELEMENT ISOLATING REGION
摘要 PROBLEM TO BE SOLVED: To provide the manufacture of a semiconductor device, where the embedding of the insulating layer in a trench element isolating region is performed favorably without increasing the number of processes. SOLUTION: This manufacture includes a process (a) of forming a pad layer 12 on the surface of a silicon substrate 10, a process (b) of forming a stopper layer 14 for chemical and mechanical polishing on the surface of the pad layer, a process (c) of etching the stopper layer and the pad layer into specified patterns, a process (d) of etching the silicon substrate with the stopper layer as a mask so as to make a trench, a process (e) of forming an insulating layer 20 to stop the trench all over the surface, a process (f) of flattening the insulating layer with the stopper layer as a stopper through chemical and mechanical polishing, a process (g) of thinning the insulating layer and the stopper layer by etching the insulating layer and the stopper layer at the same time at least, and a process (h) of forming a trench element isolating region by removing the stopper layer.
申请公布号 JP2000195943(A) 申请公布日期 2000.07.14
申请号 JP19980374107 申请日期 1998.12.28
申请人 SEIKO EPSON CORP 发明人 MARUO YUTAKA
分类号 H01L21/76;H01L27/08;(IPC1-7):H01L21/76 主分类号 H01L21/76
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