发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory, in which power consumption is reduced by preventing occurrence of a through-current between a pair of it line and a sub-data bus, and a chip can be made compact. SOLUTION: A column switch circuit CSC1n which connects a pair of bit line BLn/BLnb and a sub-data bus SDBn/SDBnb is constituted of four N transistors N15, N16, N17, N18. The N transistors N15, N17 are connected in series for the bit line BLn, and the N transistors N16, N18 are connected in series with respect to the bit line BLnb. Gates of the N transistor 15 and the N transistor 16 are connected, so that a column switch selection signal CSELn is inputted in common. Gates of the N transistor N 17 and N transistor N 18 are commonly connected to a column line CL.
申请公布号 JP2000195264(A) 申请公布日期 2000.07.14
申请号 JP19980370975 申请日期 1998.12.25
申请人 OKI MICRO DESIGN CO LTD;OKI ELECTRIC IND CO LTD 发明人 SASAKI TOSHIRO;MATSUSHITA YUICHI
分类号 G11C11/407;G11C7/10;G11C11/401;(IPC1-7):G11C11/407 主分类号 G11C11/407
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