| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which multiplex selection of a column line will not be performed, being accompanied by switching operation of a bit line and deterioration of an electrical characteristic will not be caused. SOLUTION: In a control circuit 500, a pulse signal, having the prescribed pulse width, is generated by detecting an edge of an external clock signal in the prescribed direction. A column address buffer circuit 300 takes an column address signal from the outside synchronizing with an external clock signal. An address counter circuit 310 generates continuous column addresses used with the prescribed mode. A column pre-decoder circuit 320 inputs combination of column address signals inputted from the address counter circuit 310 and outputs a signal group for selecting bit lines. Then, when the column pre-decoder circuit 320 fetches a column address signal, the circuit 320 holds a signal state in which a signal is outputted hitherto, and deactivates the signal group for the prescribed period based on this signal state and the pulse signal. |
