发明名称 THREE-WIRE TYPE INTERFACE CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a three-wire type interface circuit which excels in preventing the malfunctions in a runaway state of a CPU. SOLUTION: This interface circuit 2 secures an interface between a CPU 1 and a circuit 3 which is controlled by the CPU 1, Then a deciding means is added to the circuit 2 to send the data of the CPU 1 to the circuit 3 only in a correct format and sends no data to the circuit 3 in the incorrect formats together with a means which decides the abnormality of the CPU 1 in an incorrect format and generate a signal to control the CPU 1.</p>
申请公布号 JP2000194609(A) 申请公布日期 2000.07.14
申请号 JP19980369366 申请日期 1998.12.25
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 IHIRA YASUHISA;OGAWA MASANOBU;MATSUO MASAYUKI;KASAI HIDEKI
分类号 G06F3/00;G05B9/02;G06F1/24;G06F13/00;(IPC1-7):G06F13/00 主分类号 G06F3/00
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