| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a clock transmission circuit capable of performing transmission even when the upper limit of an operation frequency for a signal voltage conversion circuit is lower than the frequency of a clock desired to be transmitted in a clock transmission circuit transmitting a clock between two logical circuits operating with different signal voltages. SOLUTION: This clock transmission circuit is provided with a 1st flip-flop 11b operating at a leading edge of a clock in a 1st logical circuit 1, a 2nd flip-flop 11c operating at a trailing edge, a 1st signal voltage conversion circuit 2b which is connected to an output of the 1st flip-flop 11b and converts the signal voltage of the output, a 2nd signal voltage conversion circuit 2c which is connected to an output of the 2nd flip-flop 11c and converts the signal voltage of the output, and an EXCLUSIVE-OR circuit 36 which is connected to an output of the circuit 2b and an output of the circuit 2c.</p> |
