VARIABLE DELAY CIRCUIT AND OSCILLATION CIRCUIT

摘要

PROBLEM TO BE SOLVED: To enable the rough control and fine control of delay value of a circuit by connecting the substrate terminal of a PMOS transistor through a first buffer circuit to a first delay control terminal and connecting the substrate terminal of an NMOS transistor through a second buffer circuit to a second delay control terminal. SOLUTION: Delay control terminals 7 and 8 respectively control the delay of rising and falling of an output waveform. The delay control terminals 7 and 8 are driven by a high impedance circuit such as a resistance dividing circuit and application to a CMOS circuit, with which a low impedance circuit is hardly constituted, is facilitated. Buffer circuits 5 and 6 respectively constitute a source follower circuit composed of an NMOS transistor T8, resistor R1 connected to the source thereof, PMOS transistor T9 and resistor R2 connected to the source thereof. When the power source terminals of the buffer circuits 5 and 6 are connected to a power source terminal having the high potential side of a voltage higher than VDD and the low potential side of a voltage lower than GND, the change width of delay is more widened.