发明名称 ERROR CORRECTION SYSTEM AND TRANSMITTER
摘要 PROBLEM TO BE SOLVED: To easily confirm a function of error correction for a transmitter side and a receiver side for each bit without giving effect on a main signal in the error correction system in communication using a frame consisting of a header and a payload. SOLUTION: A transmitter side FEC arithmetic section 10 generates an error correction cheek bit to STS-N data. A pseudo error generating section 11 adds a pseudo error to a bit at an optional position of a check bit inserted to an overhead not in use and calculated by the transmitter side FEC arithmetic section 10 on the basis of a pseudo error addition setting signal and transmits the result to an MUX section 12. The MUX section 12 multiplexes the STS-N data and the check bit and transmits the error correction code.
申请公布号 JP2000196552(A) 申请公布日期 2000.07.14
申请号 JP19980374805 申请日期 1998.12.28
申请人 FUJITSU LTD 发明人 YAMAZAKI YUKIO;NAKAMURA TAKATOSHI;MORISHITA TAKESHI;ISHIWATARI JUNICHI
分类号 H03M13/00;H04J3/00;H04J3/14;H04J3/16;H04L1/00;H04L1/24;(IPC1-7):H04J3/00 主分类号 H03M13/00
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