| 摘要 |
PROBLEM TO BE SOLVED: To provide a method and a circuit for pre-compensating interference between marks in a large capacity storage device. SOLUTION: This device supplys a digital data stream (I) and a clock signal (Ck) to be stored in a 1st circuit and also makes the 1st circuit(CC1) output a pair of digital streams (N, R). Further, the digital streams (N, R) and the clock signal (Ck) are supplied to a 2nd circuit (DC1), and the 2nd circuit outputs a digital data stream (O) directed to a write head. In such a case, by sampling the two digital streams (N, R) by a pair of flip-flops (FN2, FR2) and also re- coupling the signals outputted from the pair of flip-flops (FN1, FR2) with a digital data stream (O) via a logical XOR gate (X1), the device delays a transition immediately following a preceding transition by a predetermined time interval (Δwp).
|
