发明名称 VITERBI DECODER AND BITERBI DECODING METHOD
摘要 PROBLEM TO BE SOLVED: To prevent deterioration in processing performance due to the number of times of memory accesses to a path memory in the case of trace-back processing and to reduce a capacity of the path memory. SOLUTION: An ACS processing section 13 estimates a most probable path in each state at a present time on the basis of a path metric calculated by branch metric processing for each unit time and a path metric up to a preceding time stored in either of a couple of path metric buffers 18a, 18b, rearranges maximum likelihood decoding information up to the preceding time stored either of a couple of data buffers 17a, 17b on the basis of the estimated path and writes the rearranged information to the other, updates the path metric stored in either of a couple of the path metric buffers 18a, 18b and writes the updated path metric to the other. A trace back processing section 14 retrieves decoded data on the basis of the path metric stored up to a present time stored in the path metric buffers 18a, 18b and the maximum likelihood decoding information up to the present time stored in the data buffers 17a, 17b.
申请公布号 JP2000196468(A) 申请公布日期 2000.07.14
申请号 JP19980366630 申请日期 1998.12.24
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 MATSUBARA TAKETSUGU
分类号 H03M13/23;H03M13/41;(IPC1-7):H03M13/23 主分类号 H03M13/23
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