发明名称 PICTURE DISPLAY DEVICE
摘要 PROBLEM TO BE SOLVED: To display a synthetic picture without confusing by dissolving the phase deviation between a horizontal synchronizing signal and a frequency N-demultiplexed signal at the time of frequency N-demultiplexing a dot clock signal. SOLUTION: A frequency demultiplexed signal 12 is a signal which is to be outputted every time the number of pulses of a dot clock signal 11 reaches a frequecy demultiplexed value, The pulse width of the frequency demultiplexed signal 12 is a value in which the maximum value which is the integral multiple of the cycle of a frequency N-demultiplexed signal 16 and does not exceed one cycle of the frequency demultiplexed signal 12 is subtracted from the one cycle of the frequency demultiplexed signal 12. An internal horizontal synchronizing signal 13 is a signal which is to be outputted every time the frequecy demultiplexed signal 12 is inputted. When the frequency demultiplexed signal 12 is inputted, a frequency N-demultiplier circuit outputs a pulse every time the dot clock signal 11 is inputted N times to output the signal having the frequency of 1/N of the signal 11. A frequency N-demultiplexed signal 16 starts the outputting of pulses in the same timing as that of the internal horizontal synchronizing signal 13. When the frequency demultiplexed signal 12 is inputted, the frequency N-demultiplier circuit makes the output to be in low. As a result, the last one pulse in one horizontal synchronizing period of the N-demultiplexed signal 16 at the time the frequency demultiplexed value is not the integral multiple of N is not outputted.
申请公布号 JP2000194344(A) 申请公布日期 2000.07.14
申请号 JP19980372147 申请日期 1998.12.28
申请人 NEC HOME ELECTRONICS LTD 发明人 UEDA KAZUMASA;MUTO HIDEAKI
分类号 H04N5/278;G09G5/00;H04N5/445;(IPC1-7):G09G5/00 主分类号 H04N5/278
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