发明名称 STABILIZED OSCILLATION DETECTING CIRCUIT, CLOCK SIGNAL OSCILLATOR, AND STABILIZED OSCILLATION DETECTING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To obtain a detecting circuit which can securely detect oscillation being stable after starting for any source voltage by counting a pulse signal when the amplitude exceeds a reference value and outputting a detection signal when the count result exceeds a reference number. SOLUTION: An amplitude decision means decides whether or not the amplitude of the inputted pulse signal exceeds a specific threshold. Then a counting means counts the pulse signal outputted from the amplitude decision means when the amplitude exceeds the reference value and also outputs the detection signal when the count result exceeds the reference number. This stabilized oscillation detecting circuit extracts an oscillation clock PA which does not reach the set threshold and a counting circuit 9 counts the extracted clock and outputs an internal rest pulse PE when the count value reaches the previously set specific value. With this internal rest pulse PE, a counting circuit 10 which is counting clock pulses PB is initialized.</p>
申请公布号 JP2000194435(A) 申请公布日期 2000.07.14
申请号 JP19980369721 申请日期 1998.12.25
申请人 NEC CORP 发明人 AKIYAMA KAZUHIRO
分类号 G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F1/04
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