发明名称 ARBITRATION CIRCUIT AND METHOD FOR SHARED MEMORY
摘要 PROBLEM TO BE SOLVED: To provide an arbitration circuit and a method of shared memory which can improve the switching speed to a different type instruction and also can reduce the degradation of its transfer performance by processing with the highest priority an instruction having the same type as that of the instruction under execution. SOLUTION: Plural devices are prepared together with instruction buffers 6-9 which are placed corresponding to the devices to store the instructions received from these devices and to report the presence or absence of wait instructions as the common signal groups, an arbitration circuit 10 which inputs the instruction signal groups received from the buffers 6-9 to perform the round robin arbitration, outputs a processing request signal to show a processing execution instruction and resets the buffers 6-9 which stores the process execution instructions and an instruction processing circuit 11 which manages the cycle time of instructions and also outputs an instruction activating instruction after the instruction indicating by the signal that is outputted from the circuit 10 is processed.
申请公布号 JP2000194683(A) 申请公布日期 2000.07.14
申请号 JP19980374146 申请日期 1998.12.28
申请人 NEC KOFU LTD 发明人 NAITO KAZUHIKO
分类号 G06F15/177;G06F12/00;(IPC1-7):G06F15/177 主分类号 G06F15/177
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