DIGITAL PHASE LOCK LOOP CIRCUIT

摘要

A digital phase lock loop circuit has a GAC circuit (4) which calculates the average values of the frequencies of the channels in a phase lock state and feeds back the calculation results to a phase lock loop. The GAC circuit has comparators (111 - 118) which compare the frequencies of the channels with an allowable frequency range and, if the frequencies of one or more channels are out of the allowable frequency range, output frequency error signals of the respective channels.