发明名称 ON-CHIP TERMINATION
摘要 <p>Integrated circuits include an impedance control circuit having at least one output terminal coupled to an on-chip reference termination device in order to control output impedance of the reference termination device such that it matches that of an external resistance. The impedance control circuit outputs are also coupled to the on-chip impedance-controlled termination devices which are coupled to each of the external transmission lines to be terminated. In this way, a single reference resistance allows many transmission lines to be properly terminated. The impedance-controlled termination devices may be implemented as pairs of binary weighted p-channel and n-channel field effect transistors.</p>
申请公布号 WO2000041300(A1) 申请公布日期 2000.07.13
申请号 US1999030607 申请日期 1999.12.10
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