| 摘要 |
<p>A method for fabricating an integrated circuit is presented wherein a dielectric base (206) is provided. A first gate layer (208) is formed upon the dielectric base (206). An intergate dielectriclayer (212) is formed upon the first gate layer (208). A second gate layer (216) is formed upon the intergate dielectric layer (212). Select portions of the first gate layer (208), the intergate dielectric layer (212), and the second gate layer (216) are then removed to form a memory cell (221) upon the dielectric base (206).</p> |
