SEU HARDENING CIRCUIT

摘要

A SEU hardening circuit for use with a data storage circuit is described. The SEU hardening circuit may use a transmission gates to provide full rail drive during a write operation. The SEU hardening circuit may also be configured so that the transistors of the SEU hardening circuit are not susceptible to parasitic bipolar turn-on particularly during a radiation event, which can increase the SEU protection provided by the circuit.