Compound semiconducteur device manufacturing process and a compound semiconducteur device manufactured by the same

摘要

A first semiconductor layer, a second semiconductor layer for source and drain regions, and a bottom SiN layer are successively formed. After the bottom SiN layer is selectively etched to make an opening, a SiON layer and a top SiN layer are formed thereon. A resist pattern having an opening that is closer to the source region than to the drain region is formed on the top SiN layer. The top SiN layer and SiON layer are etched with the resist pattern used as a mask, to expose the second semiconductor layer. The SiON layer is side-etched with hydrofluoric acid until exposing the gate-side portion of the source-side bottom SiN layer. Then, the second semiconductor layer is etched to expose the first semiconductor layer and to form the source and drain regions, where the gate-side edge of the source region is determined by that of the source-side bottom SiN layer and the gate-side edge of the drain region is determined by that of the drain-side SiON layer. Finally, a gate metal is vapor-deposited vertically on the first semiconductor layer with the opening of the top SiN layer used as a mask.