Semiconductor memory device and fabrication method thereof

摘要

A capacitor lower electrode is formed so as to be connected to a main surface of a silicon substrate. The capacitor lower electrode includes a plug portion, a bottom wall portion, and a vertical wall portion. An insulation layer for suppressing crystallization of the vertical wall portion is formed between the bottom wall portion and the vertical wall portion. A capacitor upper electrode is formed on the capacitor lower electrode with a capacitor dielectric layer therebetween.