发明名称 FLOATING GATE MEMORY APPARATUS AND METHOD FOR SELECTED PROGRAMMING THEREOF
摘要 <p>A method of creating a reverse breakdown condition in an array of memory cells arranged in columns and rows in the array, and an array structure are provided. Each cell includes a floating gate and the method of the invention includes the step of programming one of said cells by coupling a control voltage to each floating gate. The structure includes a substrate having formed therein at least an Nth or Mth row-wise oriented well, each well isolated from adjacent ones of said wells. Also provided are at least an Nth and Mth word bit line formed by an Nth and Mth impurity regions in said substrate and at least an Nth and Mth array control gate lines.</p>
申请公布号 WO2000039805(A1) 申请公布日期 2000.07.06
申请号 US1999029977 申请日期 1999.12.16
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