发明名称 Vertical IC, e.g. a vertical integrated CMOS circuit, comprises a chip stack with a via which electrically connects metallizations of spaced-apart chips and which is insulated from an intermediate chip
摘要 A vertical IC, comprising a chip stack (30) with a via (25b) which electrically connects metallizations (4, 21) of spaced-apart chips (2, 19) and which is insulated from an intermediate chip (8), is new. A vertical IC comprises (a) a stack (30) of first, second and third circuit chips (2, 8, 19), each having a circuit structure (3, 9, 20) and a metallization structure (4, 10, 21); and (b) a via (25b) which extends between and electrically connects the first chip and third chip metallization structures (4, 21) and which is electrically insulated from the second chip (8). An Independent claim is also included for production of the above vertical IC.
申请公布号 DE19904751(C1) 申请公布日期 2000.07.06
申请号 DE1999104751 申请日期 1999.02.05
申请人 FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. 发明人 RAMM, PETER;GIESER, HORST
分类号 H01L23/48;(IPC1-7):H01L25/065;H01L23/538 主分类号 H01L23/48
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