TRIGGER GENERATING JIG FOR DETECTING THE FAULT OF TEST PATTERN

摘要

PURPOSE: A trigger generating jig for detecting the fault of a test pattern is provided to easily detect the memory module error by using the combination of signals for triggering the test pattern. CONSTITUTION: A trigger generating jig comprises a first logic gate section(10) which controls an ascending edge of signals for triggering a test pattern by using the combination of CS, RAS, CAS signals at an active time of SDRAM. A second logic(20) gate section is provided to control a descending edge of signals for triggering the test pattern by using the combination of WE and free charge signals at the free charge time of SDRAM. A resistor(30) is provided to generate a trigger signal by receiving signals outputted from the first and second logic gate sections.